1. Field of the Invention
The invention relates to a radio communication device and a method of accomplishing bit synchronization pull-in or phase follow-up, and more particularly to a selective calling radio-receiver and a method of accomplishing bit synchronization pull-in.
2. Description of the Related Art
FIG. 1 illustrates an example of a conventional radio communication device. The illustrated radio communication device is constituted as a selective calling radio-receiver. The selective calling radio-receiver is comprised of an antenna 101 through which a radio signal is received, a signal-receiving circuit 102 receiving a radio signal from the antenna 101, and a decoder 103 decoding a radio signal transmitted from the signal-receiving circuit 102.
A radio signal received through the antenna 101 is demodulated in the signal-receiving circuit 102, and the thus demodulated signal is transmitted as a demodulated output signal 105 to the decoder 103.
The decoder 103 is comprised of a clock-generating circuit 106 generating a data-receiving clock, a phase-difference correcting circuit 107 which corrects a phase of the data-receiving clock, a data-receiving circuit 108 which receives the data-receiving clock from the clock-generating circuit 106, and then, receives the demodulated output signal 105 from the signal-receiving circuit 102 in accordance with the data-receiving clock, and a data-storing memory 109 which stores therein data having been received in the data-receiving circuit 108.
In a selective calling radio-receiver, synchronization in a phase is generally established between a received signal and a data-receiving clock in order for a data-receiving circuit to receive a signal at an appropriate timing. In the conventional radio communication device illustrated in FIG. 1, the above-mentioned synchronization in a phase was conducted by correcting a phase of the data-receiving clock with a certain correction, regardless of a difference in a phase between a received signal or the demodulated output signal 105.
The synchronization pull-in conducted in the radio communication device illustrated in FIG. 1 is effective when a difference in a phase between the received signal and the data-receiving clock is greater than the above-mentioned certain correction. However, even when the difference in a phase becomes smaller than a predetermined correction, a correction is kept unchanged, that is, a correction is kept at a fixed value, which reduces accuracy in phase-synchronization.
This problem can be solved to some degree, if a correction is originally designed to have a small value, however, which is accompanied with another problem of reduction in phase following ability.
Japanese Unexamined Patent Publication No. 1-284028 has suggested a selective calling receiver including a circuit which operates a bit synchronization circuit only while a synchronization word signal is being received, after a position of the synchronization word has been detected.
Japanese Patent No. 2535226 (Japanese Unexamined Patent Publication No. 1-136077) has suggested a selective calling receiver comprising a receiver which receives a selective calling signal from a base station and outputs the received signal as a digital signal, a bit synchronization circuit which synchronizes the digital signal to an internal clock generated in an internal oscillation circuit, a frame synchronization signal receiving circuit which receives a frame synchronization signal which is intermittently transmitted thereto, a phase-difference detecting circuit which detects a phase-difference at the outset of signal-receiving, based on an internal phase correction signal transmitted from the bit synchronization circuit, a bit-difference detecting circuit which detects a difference in a bit of internal timing, based on an output transmitted from the frame synchronization signal receiving circuit, a correction determining circuit which determines a correction based on outputs transmitted from the phase-difference detecting circuit and the bit-difference detecting circuit, and a correction circuit making a correction for a frequency of the internal oscillation circuit.
Japanese Unexamined Patent Publication No. 6-152502 has suggested a selective calling radio-receiver comprising a turning point detecting circuit which detects a turning point of a received signal, a timing generator which generates internal standard clock, a phase comparator which calculates a correction for a phase between an output transmitted from the turning point detecting circuit and the internal standard clock, and a variable divider which receives the correction, determines a division ratio of the internal standard clock, and reproduces a clock.
Japanese Unexamined Patent Publication No. 8-8811 has suggested a synchronization establishing apparatus which detects spatial TDMA timing with an accuracy of 1/m symbol, based on a detecting timing of a unique word.
Japanese Unexamined Patent Publication No. 9-36737 has suggested a phase-synchronous circuit including an A/D converter which converts a voltage transmitted from a low-pass filter into a digital signal, a standard value setting circuit in which a level equal to a half of an output level of the A/D converter is determined as a standard level, a comparator which compares an input level transmitted from the A/D converter to the standard level, a programmable multiplier, and a memory storing data used for controlling the programmable multiplier in accordance with a difference between the input level and the standard level.
Japanese Unexamined Patent Publication No. 7-336342 has suggested a clock reproducing circuit including an edge detecting circuit which detects an edge in a received signal and detects synchronization timing included in the received signal, a standard signal generating circuit generating a plurality of standard signals having different phases from one another, but having a common frequency, and an output selecting circuit selecting a standard signal among the plurality of standard signals, which standard signal has a phase closet to synchronization timing included in the received signal, and transmitting the thus selected standard signal as a clock signal. In accordance with the clock reproducing circuit, the clock signal is not gradually synchronized to synchronization timing included in a received signal, but is immediately synchronized to a timing relatively close to the synchronization timing.
Japanese Unexamined Patent Publication No. 6-268700 has suggested a timing reproducing circuit including a first circuit measuring estimated distances between m sample points and a zero-cross point, a second circuit calculating an average among the thus measured estimated distances, a third circuit converting the thus calculated m averages into average distances between rising points of m reproduced clocks and a next zero-cross point, detecting a difference in a phase between fall edges of the reproduced clocks and the zero-cross point, controls a phase in the reproduced clocks at synchronization, and controls an up-down counter based on both upper most bits of the estimated distances and the zero-cross detecting signal, to thereby control a difference in a phase between the zero-cross point of the received signal and the fall edges of the reproduced clocks.
Japanese Unexamined Patent Publication No. 9-135240 has suggested a digital phase-synchronous circuit including an N-bit counter which divides an output transmitted from digital VCO to thereby transmit N divided signals, a selector which switches the divided signals to a symbol clock in response to a switched rate, and an adder positioned between the N-bit counter 6 and the selector 7. When a rate is switched, a switch transmits phase offset values established in accordance with a plurality of transfer rates, to the adder, and the adder transmits a divided output to the selector.
The above-mentioned Publications are accompanied with the same problem as the problem having been explained in the conventional radio communication device with reference to FIG. 1.
In view of the above-mentioned problem, it is an object of the present invention to provide a radio communication device and a method of accomplishing bit synchronization both of which are capable of enhancing an accuracy with which phase-synchronization is accomplished between a received signal and a data-receiving clock, and further enhancing phase following ability.
In one aspect of the present invention, there is provided a radio communication device receiving radio signals in accordance with a data-receiving clock, including a phase-difference correcting circuit which varies a correction for a phase of the data-receiving clock in accordance with a difference in a phase between received radio signal and the data-receiving clock.
In accordance with the radio communication device, an appropriate correction for a phase of a data-receiving clock is selected in accordance with a difference in a phase between a received radio signal and a data-receiving clock unlike a conventional radio communication device where a phase of a data-receiving clock is always corrected with a fixed correction. As a result, it is possible to enhance an accuracy with which a radio signal is received.
The radio communication device preferably further includes a maximum correction establishing circuit which in advance establishes a maximum correction for a phase of the data-receiving clock, and determines a correction for a phase of the data-receiving clock within the thus established maximum correction.
It would be possible to control an accuracy with which a radio signal is received, into a desired range by defining a maximum range of a correction.
It is preferable that the phase-difference correcting circuit makes a correction for a phase of the data-receiving clock, which correction is equal to the maximum correction, when a difference in a phase between the radio signal and the data-receiving clock is equal to or greater than the maximum correction, whereas the phase-difference correcting circuit makes a correction for a phase of the data-receiving clock, which correction is determined to compensate for a difference in a phase between the radio signal and the data-receiving clock, when the difference in a phase is equal to or smaller than the maximum correction.
It is preferable that the maximum correction established by the maximum correction establishing circuit is variable.
The radio communication device may further include an oscillator transmitting a pulse signal by which the data-receiving clock is generated, in which case, the oscillator is preferably an oscillator transmitting pulse signals at a fixed frequency, and the maximum correction and the difference in a phase may be established preferably in the form of the number of pulse signals generated by the oscillator.
By representing the maximum correction and the difference in a phase with the number of pulse signals generated by the oscillator, phase-synchronization control could be readily carried out on the basis of the number of pulses.
It is preferable that the phase-difference correcting circuit is comprised of a comparator comparing the difference in a phase to the maximum correction, and a selector selecting a smaller one between the difference in a phase and the maximum correction in accordance with a comparison result provided from the comparator, and determining the smaller one as a correction for a phase of the data-receiving clock.
As is obvious to those skilled in the art, the phase-difference correcting circuit may be designed to have another structure.
It is preferable that the maximum correction establishing circuit is comprised of a memory storing therein a plurality of corrections having different values from one another, and a selector selecting one of the plurality of corrections.
For instance, the maximum correction establishing circuit selects a first correction before a synchronization signal in the radio signal is detected, and selects a second correction after the synchronization signal has been detected, the second correction being smaller than the first correction.
It is generally considered that there is a significant difference between a received signal and a data-receiving clock before a synchronization signal in a radio signal is detected, in particular, immediately after a radio signal has been received. Hence, it is preferable to first select a greater correction (first correction), and then, select a smaller correction (second correction) after a synchronization signal has been detected.
It is preferable that the maximum correction establishing circuit receives the difference in a phase, and a first correction which is a maximum one among the plurality of corrections, and that the maximum correction establishing circuit switches a correction for a phase of the data-receiving clock from the first correction to a third correction smaller than the first correction in response to the difference in a phase becoming smaller than the first correction, even when the maximum correction establishing circuit selects the first correction.
It is also preferable that the phase of the data-receiving clock is compensated for by the third correction until receipt of a synchronization signal in the radio signal has been completed.
That is, it is preferable that the third correction is used until a synchronization signal is completely received, and that a correction smaller than the third correction, such as the above-mentioned second correction, is used after a synchronization signal has been completely received. Thus, it is possible to enhance an accuracy in phase control by gradually decreasing a correction in accordance with the difference in a phase.
It is preferable that the third correction is next smaller than the first correction among the plurality of corrections.
Before a synchronization signal is received, there remains possibility that a phase is accidentally synchronized by noises. Thus, it is possible to avoid such possibility by switching a correction from the first correction to the third correction which is next smaller than the first correction.
The radio communication device in accordance with the present invention may be applied to any type of device. For instance, the radio communication device may be designed to constitute a selective calling radio-receiver.
There is further provided a radio communication device including (a) a radio-receiving circuit which receives a radio signal, and transmits a receipt signal in accordance with the received radio signal, (b) a clock-generating circuit which generates a data-receiving clock, (c) a data-receiving circuit which receives the receipt signal in accordance with the data-receiving clock, (d) a phase-difference detecting circuit which detects a difference in a phase between the receipt signal and the data-receiving clock, (e) a phase-difference correcting circuit which varies a correction for a phase of the data-receiving clock in accordance with the difference in a phase detected by the phase-difference detecting circuit, and (f) a maximum correction establishing circuit which establishes a maximum correction for a phase of the data-receiving clock.
The radio communication device makes it possible to control a correction for a phase in accordance with a difference in a phase between a received radio signal and a data-receiving clock, and further control a maximum correction for the same, ensuring an accuracy with which a radio signal is received and synchronization pull-in or phase follow-up at an enhanced rate.
It is preferable that the radio communication device further includes an oscillator which supplies a pulse signal to the clock-generating circuit, and a divider which divides the pulse signal.
It is preferable that the phase-difference detecting circuit detects a difference in a phase between a turning point of the receipt signal and a rise edge of the data-receiving clock.
It is preferable that the phase-difference correcting circuit varies the number of division of the pulse signal by one to thereby correct a phase of the data-receiving clock.
It is preferable that the phase-difference correcting circuit corrects a phase of the data-receiving clock so that a turning point of the receipt signal is synchronized to a rise edge of the data-receiving clock and the data-receiving circuit receives the receipt signal at a fall edge of the data-receiving clock.
The phase-difference correcting circuit makes it possible to receive a signal at a center of a symbol in a demodulated waveform of the received signal.
For instance, the maximum correction establishing circuit may be comprised of (a) a synchronization signal detecting circuit which detects a synchronization signal constituting a part of the receipt signal, (b) a memory which stores a plurality of corrections each having a different value from one another, and (c) a correction control circuit which selects a correction for a phase of the data-receiving clock among the plurality of corrections, in which case, the correction control circuit may be designed to select a first correction before the synchronization signal is detected, and select a second correction after the synchronization signal detecting circuit has detected the synchronization signal, the second correction being smaller than the first correction.
A phase may be significantly different between a received signal and a data-receiving clock immediately after a radio signal is received. Hence, it is preferable to first select a greater correction (first correction), and then, a smaller correction (second correction) after a synchronization signal has been detected.
It is preferable that the correction control circuit temporarily selects the first correction after having selected the second correction.
A symbol rate may be changed in dependence on a signal transmission system, and a phase maybe deviated at that time. In such a case, it is preferable to temporarily select a great correction (first correction) again.
In another aspect of the present invention, there is provided a method of establishing synchronization in a radio communication device, including the steps of (a) receiving a radio signal in accordance with a data-receiving clock, and (b) varying a correction for a phase of the data-receiving clock in accordance with a difference in a phase between the radio signal and the data-receiving clock.
In accordance with method, an appropriate correction for a phase of a data-receiving clock is selected in accordance with a difference in a phase between a received radio signal and a data-receiving clock unlike a conventional radio communication device where a phase of a data-receiving clock is always corrected with a fixed correction. As a result, it is possible to enhance an accuracy with which a radio signal is received.
The method may further include the step of establishing a maximum correction which is maximum among the correction for a phase of the data-receiving clock, and wherein the phase of data-receiving clock is corrected within the maximum correction in the step (b).
It is preferable that the difference in a phase is equal to or greater than the maximum correction, a correction equal to the maximum correction is made, and when the difference in a phase is smaller than the maximum correction, a correction is made in accordance with the difference in a phase, in the step (b).
The method may further include the step of varying the maximum correction.
It is preferable that a plurality of corrections each having a different value from one another is in advance established, one of the corrections is selected, and the phase of the data-receiving clock is corrected with the thus selected correction in the step (b).
It is preferable that a first correction is selected before a synchronization signal in the radio signal is detected, and a second correction smaller than the first correction is selected after the synchronization signal has been detected.
It is preferable that a correction for a phase of the data-receiving clock is switched from the first correction to a third correction smaller than the first correction in response to the difference in a phase becoming smaller than the first correction, even when the first correction is selected in the step (b).
It is preferable that the third correction is next smaller than the first correction among the plurality of corrections, in which case, it is preferable that the phase of the data-receiving clock is corrected by the third correction until receipt of the synchronization signal has been completed.
There is further provided a method of establishing synchronization in a radio communication device, including the steps of (a) receiving a radio signal, and transmitting a receipt signal in accordance with the thus received radio signal, (b) generating a data-receiving clock, (c) detecting a difference in a phase between the receipt signal and the data-receiving clock, (d) establishing a maximum correction for a phase of the data-receiving clock, (e) varying a correction for a phase of the data-receiving clock in accordance with the difference in a phase, having been detected in the step (c), and (f) receiving the receipt signal in accordance with the data-receiving clock having a phase having been corrected in the step (e).
The method makes it possible to control a correction for a phase in accordance with a difference in a phase between a received radio signal and a data-receiving clock, and further control a maximum correction for the same, ensuring an accuracy with which a radio signal is received and synchronization pull-in or phase follow-up at an enhanced rate.
For instance, the step (e) may be comprised of (e1) comparing the difference in a phase to the maximum correction, and (e2) selecting a smaller one between the difference in a phase and the maximum correction in accordance with a result of the step (e1), and determining the thus selected smaller one as a correction for a phase of the data-receiving clock.
For instance, a difference in a phase between a turning point in the receipt signal and a rise edge in the data-receiving clock is detected in the step (c).
For instance, a phase of the data-receiving clock is corrected in the step (e) so that a turning point of the receipt signal is synchronized to a rise edge of the data-receiving clock and the receipt signal is received at a fall edge of the data-receiving clock.
For instance, a first correction may be selected before a synchronization signal in the radio signal is detected, and a second correction smaller than the first correction may be selected after the synchronization signal has been detected, in the step (e).
For instance, first selection may be temporarily selected again even after the second correction has been selected in the step (e).
In accordance with the above-mentioned present invention, when a data-receiving clock follows a radio signal in a phase, a correction for a phase of the data-receiving clock is varied in accordance with a difference in a phase between a received radio signal and the data-receiving clock, and, if necessary, a maximum correction for a phase of the data-receiving clock is also varied. This ensures higher accuracy with which a radio signal is received. As a result, it is possible to accomplish phase follow-up or synchronized receipt at an enhanced rate and with higher accuracy.
The above and other objects and advantageous features of the present invention will be made apparent from the following description made with reference to the accompanying drawings, in which like reference characters designate the same or similar parts throughout the drawings.